\doxysection{SYSCFG\+\_\+\+Type\+Def Struct Reference}
\hypertarget{struct_s_y_s_c_f_g___type_def}{}\label{struct_s_y_s_c_f_g___type_def}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}


System configuration controller.  




{\ttfamily \#include $<$stm32h723xx.\+h$>$}

\doxysubsubsection*{Public Attributes}
\begin{DoxyCompactItemize}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_ac0fd2e8e795e3cb9afe885963de90cd7}{RESERVED1}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_acdad8a8f75b45514bf1af615401d6ab6}{PMCR}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a66a06b3aab7ff5c8fa342f7c1994bf7d}{EXTICR}} \mbox{[}4\mbox{]}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_af9e58364169ac3d84d12f9e4aabf1f62}{CFGR}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a0f4fb119d6edb48325e468aa3e67877d}{RESERVED2}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a4b72e8104e124ffe7da8f6b1e42ff1e5}{CCCSR}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a4e4ef9c45d95b95d5ea7fa166ed6c88c}{CCVR}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a916b26f435ff938144e0e74d1e4b68b3}{CCCR}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a7ae8161ce802d4ce1f885754c50f444f}{RESERVED3}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_ae6ca0c33258c7876f958170ef0ae5c78}{ADC2\+ALT}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a7795b5064af95f77d08f0627c34e56c8}{RESERVED4}} \mbox{[}60\mbox{]}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_aff4d5fcad23e79b63fb8068a91f9bc4c}{PKGR}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a597e8bd933a414d61cb04f2cfd314e07}{RESERVED5}} \mbox{[}118\mbox{]}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a9ca884c93311fda6fd1d01aba5cce5b4}{UR0}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_af13f7ea65596c9ca978f79539ac2dcc8}{UR1}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a0710a4169dea79b2c284dead582c9db6}{UR2}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_aacb9659c156f6b7e5c59e1d999176b8d}{UR3}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_ac79fcca95750a11326c62f04ff8b070b}{UR4}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_afc7ca54e00e4d6b33f129ed99b76c70c}{UR5}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_ad4475488878038fb4b425ee0f265c6d0}{UR6}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a3f2319525b1743d8f731bccd50b4ddf0}{UR7}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_afc32d5ea4cf765e0f2d5aeb5e3f9bae4}{RESERVED6}} \mbox{[}3\mbox{]}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a1066546475801b382f820cdf1f65c046}{UR11}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a37cae41afcd80e57233e1ecd93a11c43}{UR12}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a8eb7f96e17bef6996906322cbfaa8db4}{UR13}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a2a8053504935bb02e0c498fb66d9a7c7}{UR14}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_afbd1460717aa8f92a0bb5f23603f06fb}{UR15}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a280af2276b0f7a393aee21988ab99787}{UR16}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a8ac8f0c5cce83f1c93df9ffeae1df62c}{UR17}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_y_s_c_f_g___type_def_a6a5652438a866e600fd992c4956b5811}{UR18}}
\end{DoxyCompactItemize}


\doxysubsection{Detailed Description}
System configuration controller. 

\label{doc-variable-members}
\Hypertarget{struct_s_y_s_c_f_g___type_def_doc-variable-members}
\doxysubsection{Member Data Documentation}
\Hypertarget{struct_s_y_s_c_f_g___type_def_ae6ca0c33258c7876f958170ef0ae5c78}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!ADC2ALT@{ADC2ALT}}
\index{ADC2ALT@{ADC2ALT}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{ADC2ALT}{ADC2ALT}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_ae6ca0c33258c7876f958170ef0ae5c78} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+ADC2\+ALT}

ADC2 internal input alternate connection register, Address offset\+: 0x30 \Hypertarget{struct_s_y_s_c_f_g___type_def_a916b26f435ff938144e0e74d1e4b68b3}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!CCCR@{CCCR}}
\index{CCCR@{CCCR}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{CCCR}{CCCR}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a916b26f435ff938144e0e74d1e4b68b3} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+CCCR}

SYSCFG compensation cell code register, Address offset\+: 0x28 \Hypertarget{struct_s_y_s_c_f_g___type_def_a4b72e8104e124ffe7da8f6b1e42ff1e5}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!CCCSR@{CCCSR}}
\index{CCCSR@{CCCSR}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{CCCSR}{CCCSR}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a4b72e8104e124ffe7da8f6b1e42ff1e5} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+CCCSR}

SYSCFG compensation cell control/status register, Address offset\+: 0x20 \Hypertarget{struct_s_y_s_c_f_g___type_def_a4e4ef9c45d95b95d5ea7fa166ed6c88c}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!CCVR@{CCVR}}
\index{CCVR@{CCVR}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{CCVR}{CCVR}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a4e4ef9c45d95b95d5ea7fa166ed6c88c} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+CCVR}

SYSCFG compensation cell value register, Address offset\+: 0x24 \Hypertarget{struct_s_y_s_c_f_g___type_def_af9e58364169ac3d84d12f9e4aabf1f62}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!CFGR@{CFGR}}
\index{CFGR@{CFGR}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{CFGR}{CFGR}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_af9e58364169ac3d84d12f9e4aabf1f62} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+CFGR}

SYSCFG configuration registers, Address offset\+: 0x18 \Hypertarget{struct_s_y_s_c_f_g___type_def_a66a06b3aab7ff5c8fa342f7c1994bf7d}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!EXTICR@{EXTICR}}
\index{EXTICR@{EXTICR}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{EXTICR}{EXTICR}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a66a06b3aab7ff5c8fa342f7c1994bf7d} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+EXTICR\mbox{[}4\mbox{]}}

SYSCFG external interrupt configuration registers, Address offset\+: 0x08-\/0x14 \Hypertarget{struct_s_y_s_c_f_g___type_def_aff4d5fcad23e79b63fb8068a91f9bc4c}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!PKGR@{PKGR}}
\index{PKGR@{PKGR}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{PKGR}{PKGR}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_aff4d5fcad23e79b63fb8068a91f9bc4c} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+PKGR}

SYSCFG package register, Address offset\+: 0x124 \Hypertarget{struct_s_y_s_c_f_g___type_def_acdad8a8f75b45514bf1af615401d6ab6}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!PMCR@{PMCR}}
\index{PMCR@{PMCR}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{PMCR}{PMCR}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_acdad8a8f75b45514bf1af615401d6ab6} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+PMCR}

SYSCFG peripheral mode configuration register, Address offset\+: 0x04 \Hypertarget{struct_s_y_s_c_f_g___type_def_ac0fd2e8e795e3cb9afe885963de90cd7}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!RESERVED1@{RESERVED1}}
\index{RESERVED1@{RESERVED1}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{RESERVED1}{RESERVED1}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_ac0fd2e8e795e3cb9afe885963de90cd7} 
uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+RESERVED1}

Reserved, Address offset\+: 0x00 \Hypertarget{struct_s_y_s_c_f_g___type_def_a0f4fb119d6edb48325e468aa3e67877d}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!RESERVED2@{RESERVED2}}
\index{RESERVED2@{RESERVED2}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{RESERVED2}{RESERVED2}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a0f4fb119d6edb48325e468aa3e67877d} 
uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+RESERVED2}

Reserved, Address offset\+: 0x1C \Hypertarget{struct_s_y_s_c_f_g___type_def_a7ae8161ce802d4ce1f885754c50f444f}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!RESERVED3@{RESERVED3}}
\index{RESERVED3@{RESERVED3}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{RESERVED3}{RESERVED3}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a7ae8161ce802d4ce1f885754c50f444f} 
uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+RESERVED3}

Reserved, Address offset\+: 0x2C \Hypertarget{struct_s_y_s_c_f_g___type_def_a7795b5064af95f77d08f0627c34e56c8}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!RESERVED4@{RESERVED4}}
\index{RESERVED4@{RESERVED4}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{RESERVED4}{RESERVED4}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a7795b5064af95f77d08f0627c34e56c8} 
uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+RESERVED4\mbox{[}60\mbox{]}}

Reserved, 0x34-\/0x120 \Hypertarget{struct_s_y_s_c_f_g___type_def_a597e8bd933a414d61cb04f2cfd314e07}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!RESERVED5@{RESERVED5}}
\index{RESERVED5@{RESERVED5}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{RESERVED5}{RESERVED5}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a597e8bd933a414d61cb04f2cfd314e07} 
uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+RESERVED5\mbox{[}118\mbox{]}}

Reserved, 0x128-\/0x2\+FC \Hypertarget{struct_s_y_s_c_f_g___type_def_afc32d5ea4cf765e0f2d5aeb5e3f9bae4}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!RESERVED6@{RESERVED6}}
\index{RESERVED6@{RESERVED6}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{RESERVED6}{RESERVED6}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_afc32d5ea4cf765e0f2d5aeb5e3f9bae4} 
uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+RESERVED6\mbox{[}3\mbox{]}}

Reserved, Address offset\+: 0x320-\/0x328 \Hypertarget{struct_s_y_s_c_f_g___type_def_a9ca884c93311fda6fd1d01aba5cce5b4}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR0@{UR0}}
\index{UR0@{UR0}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR0}{UR0}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a9ca884c93311fda6fd1d01aba5cce5b4} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR0}

SYSCFG user register 0, Address offset\+: 0x300 \Hypertarget{struct_s_y_s_c_f_g___type_def_af13f7ea65596c9ca978f79539ac2dcc8}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR1@{UR1}}
\index{UR1@{UR1}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR1}{UR1}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_af13f7ea65596c9ca978f79539ac2dcc8} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR1}

SYSCFG user register 1, Address offset\+: 0x304 \Hypertarget{struct_s_y_s_c_f_g___type_def_a1066546475801b382f820cdf1f65c046}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR11@{UR11}}
\index{UR11@{UR11}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR11}{UR11}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a1066546475801b382f820cdf1f65c046} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR11}

SYSCFG user register 11, Address offset\+: 0x32C \Hypertarget{struct_s_y_s_c_f_g___type_def_a37cae41afcd80e57233e1ecd93a11c43}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR12@{UR12}}
\index{UR12@{UR12}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR12}{UR12}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a37cae41afcd80e57233e1ecd93a11c43} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR12}

SYSCFG user register 12, Address offset\+: 0x330 \Hypertarget{struct_s_y_s_c_f_g___type_def_a8eb7f96e17bef6996906322cbfaa8db4}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR13@{UR13}}
\index{UR13@{UR13}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR13}{UR13}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a8eb7f96e17bef6996906322cbfaa8db4} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR13}

SYSCFG user register 13, Address offset\+: 0x334 \Hypertarget{struct_s_y_s_c_f_g___type_def_a2a8053504935bb02e0c498fb66d9a7c7}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR14@{UR14}}
\index{UR14@{UR14}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR14}{UR14}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a2a8053504935bb02e0c498fb66d9a7c7} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR14}

SYSCFG user register 14, Address offset\+: 0x338 \Hypertarget{struct_s_y_s_c_f_g___type_def_afbd1460717aa8f92a0bb5f23603f06fb}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR15@{UR15}}
\index{UR15@{UR15}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR15}{UR15}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_afbd1460717aa8f92a0bb5f23603f06fb} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR15}

SYSCFG user register 15, Address offset\+: 0x33C \Hypertarget{struct_s_y_s_c_f_g___type_def_a280af2276b0f7a393aee21988ab99787}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR16@{UR16}}
\index{UR16@{UR16}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR16}{UR16}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a280af2276b0f7a393aee21988ab99787} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR16}

SYSCFG user register 16, Address offset\+: 0x340 \Hypertarget{struct_s_y_s_c_f_g___type_def_a8ac8f0c5cce83f1c93df9ffeae1df62c}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR17@{UR17}}
\index{UR17@{UR17}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR17}{UR17}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a8ac8f0c5cce83f1c93df9ffeae1df62c} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR17}

SYSCFG user register 17, Address offset\+: 0x344 \Hypertarget{struct_s_y_s_c_f_g___type_def_a6a5652438a866e600fd992c4956b5811}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR18@{UR18}}
\index{UR18@{UR18}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR18}{UR18}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a6a5652438a866e600fd992c4956b5811} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR18}

SYSCFG user register 18, Address offset\+: 0x348 \Hypertarget{struct_s_y_s_c_f_g___type_def_a0710a4169dea79b2c284dead582c9db6}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR2@{UR2}}
\index{UR2@{UR2}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR2}{UR2}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a0710a4169dea79b2c284dead582c9db6} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR2}

SYSCFG user register 2, Address offset\+: 0x308 \Hypertarget{struct_s_y_s_c_f_g___type_def_aacb9659c156f6b7e5c59e1d999176b8d}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR3@{UR3}}
\index{UR3@{UR3}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR3}{UR3}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_aacb9659c156f6b7e5c59e1d999176b8d} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR3}

SYSCFG user register 3, Address offset\+: 0x30C \Hypertarget{struct_s_y_s_c_f_g___type_def_ac79fcca95750a11326c62f04ff8b070b}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR4@{UR4}}
\index{UR4@{UR4}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR4}{UR4}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_ac79fcca95750a11326c62f04ff8b070b} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR4}

SYSCFG user register 4, Address offset\+: 0x310 \Hypertarget{struct_s_y_s_c_f_g___type_def_afc7ca54e00e4d6b33f129ed99b76c70c}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR5@{UR5}}
\index{UR5@{UR5}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR5}{UR5}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_afc7ca54e00e4d6b33f129ed99b76c70c} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR5}

SYSCFG user register 5, Address offset\+: 0x314 \Hypertarget{struct_s_y_s_c_f_g___type_def_ad4475488878038fb4b425ee0f265c6d0}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR6@{UR6}}
\index{UR6@{UR6}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR6}{UR6}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_ad4475488878038fb4b425ee0f265c6d0} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR6}

SYSCFG user register 6, Address offset\+: 0x318 \Hypertarget{struct_s_y_s_c_f_g___type_def_a3f2319525b1743d8f731bccd50b4ddf0}\index{SYSCFG\_TypeDef@{SYSCFG\_TypeDef}!UR7@{UR7}}
\index{UR7@{UR7}!SYSCFG\_TypeDef@{SYSCFG\_TypeDef}}
\doxysubsubsection{\texorpdfstring{UR7}{UR7}}
{\footnotesize\ttfamily \label{struct_s_y_s_c_f_g___type_def_a3f2319525b1743d8f731bccd50b4ddf0} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SYSCFG\+\_\+\+Type\+Def\+::\+UR7}

SYSCFG user register 7, Address offset\+: 0x31C 

The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize}
\item 
C\+:/\+Users/\+ASUS/\+Desktop/dm-\/ctrl\+H7-\/balance-\/9025test/\+Drivers/\+CMSIS/\+Device/\+ST/\+STM32\+H7xx/\+Include/\mbox{\hyperlink{stm32h723xx_8h}{stm32h723xx.\+h}}\end{DoxyCompactItemize}
